TSMC's advanced packaging is sought after, and it is reported that Nvidia's high-end chips intend to use SoIC technology

DigiTimes said that Nvidia is currently stepping up its cooperation with TSMC on high-end chips. Nvidia is considering using TSMC's SoIC technology for HPC chips, the sources said.

As Moore's Law is about to face the physical limit, advanced packaging technologies including chiplets and heterogeneous integration are hot topics in the field of high-efficiency computing (HPC) chips, which have continued from the Hot Chips conference in late August 2022 to the present. ...

According to public information, SOIC (Small Outline Integrated Circuit Package) is a small outline integrated circuit package, which refers to a small outline integrated circuit with no more than 28 outer leads. It is derived from the SOP (Small Outline Package) package and generally has a wide It is one of the surface mount integrated circuit packaging forms, which reduces the space by about 30-50% and the thickness by about 70% compared with the equivalent DIP package.

Simply put, SoIC is an innovative multi-chip stacking technology from TSMC that enables wafer-level bonding technology for processes below 10nm. This technology has no protruding bonding structure, so it has better performance.

HPC designs typically use chiplets in various package types. MCMs are ideal for smaller, low-power designs. The 2.5D design is suitable for artificial intelligence (AI) workloads because GPUs tightly coupled with HBM provide a powerful combination of computing power and memory capacity. With vertically stacked CPUs and fast memory access, 3D ICs are ideal for general HPC workloads.

TSMC HPC business development director said that TSMC expects HPC to continue to be the strongest growth platform in the future until at least 2025. The HPC space as defined by TSMC includes CPUs, GPUs, and AI accelerators.

In addition, the head of TSMC HPC business development not only reiterated that TSMC's 5nm family mass production continued to be strong for the third year, but also shared that the N4X and N4P extended by TSMC's 5nm family have won the favor of many customers, and said that TSMC 3nm will be put into production in the second half of the year.

In April this year, TSMC said that its revenue contribution from HPC in Q1 this year reached 41%, surpassing mobile phones as the largest revenue source for the first time.

There is also news from the supply chain that Nvidia internally expects that the annual growth of HPC chip performance will reach about 200-250%. If the progress is smooth, new products with a 5nm enhanced version can be launched at the earliest in the third quarter.